BU VLSI Cadence Tutorial

This wiki page contains a complete tutorial for a typical bottom-up design flow using CADENCE Custom IC Design Tools. The examples were generated using the TSMC 0.30um CMOS025 process technology files, prepared at North Carolina State University (NCSU) and made available through MOSIS.

Please click on any link in the design flow (below) to see a detailed description of the design steps and to view each design tutorial.

This tutorial is adapted from a http://www.vlsi.wpi.edu/cds/, cadence tutorial created by Worcester Polytechnic Institute, http://www.wpi.edu,.

Back to Cadence Wiki

Moin: Cadence/Tutorial (last edited 2015-01-20 14:19:52 by jkgoebel)